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Zeno Semiconductor, Inc. develops and licenses novel memory and logic technologies, which provide innovative paths to scaling semiconductor devices. The memory and logic technologies are manufacturable on mainstream CMOS and FinFET fabrication processes, with no new materials or equipments, with no changes to any of the existing libraries and IPs. Zeno currently has been awarded more than 200 patents.



Zeno delivered an Invited Lecture at Integrated Circuits and Devices (ICD) Workshop 2024, highlighting progress in 1-transistor SRAM and Boosted Transistor.
Macro-Compact Model of the 1T-SRAM was published at
Zeno Presented
Results from FinFET node at SSDM 2018 and IEDM 2018

1-Transistor SRAM Cell Scales to FinFET Technology Node (EE Web, Dec 6, 2018)
Zeno Semi Expands On-Chip Memory (Semiconductor Engineering, Oct 30, 2018)
Nikkei xTECH: US startup, Zeno, develops 1-transistor SRAM (Sep 14, 2018)
A Boosted MOS Transistor (EE Journal)
(βoosted) Transistor Trick Beats Moore (EE Times)

to Products

Zeno 1-transistor Bi-SRAM (bi-stable, BiCMOS) provides a static memory cell with 5x smaller cell size. It is bi-stable, hence does not require refresh operation, and is compatible with CMOS logic process.

Zeno βoosted transistor technology results in 4x gain in power-performance product within the same technology node.


βoosted Transistor


to Team


Yuniarto Widjaja, Ph.D.

Founder and CEO

Dr. Widjaja graduated with Ph.D. in Chemical Engineering with minor in Electrical Engineering from Stanford University. He held engineering and management positions at Silicon Storage Technology upon graduation, most recently served as Program Manager in Technology Development. He currently holds more than 50 patents.

Zvi Or-Bach 

Executive Chairman

Serial entrepreneurs with over 30 years of experience. Mr. Or-Bach is the founder of Chip Express, eASIC, and MonolithIC 3D Inc. He received the EETimes Innovator of the Award in 2005 for his invention of the first Structured ASIC architecture, as well as a finalist for the award in 2011 and 2012 for his pioneering work on monolithic 3D-IC.

Stefan K.Lai, Ph.D.

Member of Technical Advisory Board

Dr. Lai is the co-inventor of EPROM tunnel oxide (ETOX) flas memory cell, which has become the industry standard. He was appointed Vice President of Intel’s Technology and Manufacturing Group in 2000, where he led the development of non-volatile memory technology including phase change memory, and retired from Intel at the end of 2006. He was the VP, Business Development of Ovonyx, Inc. from February 2007 to July 2008.

Paul Lui

Member of Advisory Board

Paul is the President and GM of Silicon Storage Technology (SST) China. He is the CEO of Linvex Technology, Inc. (acquired by SST) and Pesident (USA) of Macronix, a Taiwan-based company engaged in the design, manufacture and distribution of memory ICs (2337.Taiwan). Paul received his MSEE from UC Berkeley. 

Prof. Yoshio Nishi

Professor, Electrical Engineering (research) and Materials Science and Engineering (courtesy), Stanford University

Yoshio Nishi is a professor at Stanford University since May 2002. His research interest covers nanoelectronic devices and materials, a device layer transfer for 3D integration, nanowire devices, and resistance change nonvolatile memory materials and devices. He has published more than 200 papers including conference proceedings, and coauthored/edited 9 books. He holds more than 70 patents in the United States and Japan.


Prior to joining Stanford, Prof. Nishi has industrial experiences at Toshiba, Hewett-Packard, and Texas Instruments, most recently as the VP and Director of R&D for the semiconductor group, and established the Kilby Center.


Prof. Nishi is a Fellow of the IEEE, a member of the Japan Society of Applied Physics and the Electrochemical Society, and recipients of the 1995 IEEE Jack Morton Award and the 2002 IEEE Robert Noyce Medal.

Dinesh Maheshwari

Member of Technical Advisory Board

Technologist, strategist, and entrepreneur with ~30 years of experience in semiconductors, systems & softward, most recently as the CTO, Memory Division of Cypress (CY), Board of Directors of JEDEC. Prior to CY, he held senior technical positions at Silicon Light Machines, Synopsys, and several startups (two acquired by Mentor Graphics and Cadence). He has been awarded 49 US patents in software, optical communication and ICs for networking, handsets, SRAMs & MEMs. Has authored invited papers for ISSCC and CICC. He is also a Member of Advisory Board of Kandou Bas, Switzerland and Deca Tech (CY subsidiary), and a Parter at Silicon Catalyst.

Serguei Okhonin, Ph.D.

Member of Technical Advisory Board

Dr. Okhonin is the co-founder of Innovative Silicon, where he co-invented SOI-based floating-body memory cell (Z-RAM). He received his M.Sc. in Physics from Novosibirsk State University in 1980 and his Ph.D. degree from Swiss Federal Institute of Technology (EPFL) in 2001. He has authored or co-authored more than 50 papers and more than 20 patents. He is currently the CEO of ActLight

Pieter Vorenkamp

Member of Advisory Board

Pieter previously served as Senior Vice President and General Manager of IP Group at Cadence Design Systems Inc. Prior to joining Cadence, he served for eighteen years at Broadcom as Senior Vice President of Operations Engineering, and at Philips Semiconductors (now NXP Semiconductors) as the Manager of the Converters and Imaging Systems business


830 Stewart Dr. #104
Sunnyvale, CA  94085

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